1. Field of the Invention
The present invention relates to a semiconductor device having a FET and, more particularly, to improvement of an integration density of the semiconductor device.
2. Description of the Related Art
FIG. 1 is a plan view of a pattern showing a conventional MOSFET.
In FIG. 1, reference numeral 10 denotes a field region. An element region 11 in which MOSFETs are formed is isolated by the field region 10. MOSFETs Q100 and Q102 are formed in the element region 11. Each of the MOSFETs Q100 and Q102 consists of a gate electrode 12, a source region 13, and a drain region 14. The source and drain regions 13 and 14 are formed on both sides of the gate electrode 12.
As described above, in a conventional technique, the MOSFETs Q100 and Q102 ar isolated from each other by the field region 10. For this reason, a ratio of an area required for the field region 10 to an area of a chip is necessarily increased, and a semiconductor device consisting of a plurality of MOSFETs cannot obtain a high integration density.